VLSI implementation of a high speed systolic finite field constant multiplier

Mitra, Sanjay Nirendra2015-05-122015-05-121991https://scholarworks.montana.edu/handle/1/7141enIntegrated circuits--Very large scale integrationVLSI implementation of a high speed systolic finite field constant multiplierThesisCopyright 1991 by Sanjay Nirendra Mitra