Distributed amplifier circuit design using a commercial CMOS process technology

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Montana State University - Bozeman, College of Engineering


The demand for ever increasing amounts and rates of data transmission is one of the most significant driving forces in the design of modern telecommunications systems. In response, integrated circuit (IC) designers are forced to achieve higher and higher bit rates. Increased bit rates in turn impel the IC communication systems to achieve ever larger bandwidths while maintaining stringent requirements on other design specifications such as cost, die-size and power consumption. One alternative approach to high-bandwidth design showing promise is the design of distributed integrated circuits. Distributed integrated circuit creation applies design methods that have been investigated for nearly seventy years to the rapidly evolving semiconductor process technologies of the modern IC landscape.
Simply stated, it is an approach whereby the combination of multiple parallel signals results in increased bandwidths, enhanced power combining faculties, and often novel design capabilities for a given IC process. Consequently, the focus of this thesis is upon the application of distributed integrated circuit methodologies towards the realization of a distributed broadband amplifier in a commercial CMOS process technology. On-chip spiral inductors were utilized in on-chip bias circuitry. The measured performance of the DA was found to be significantly degraded from that of initial simulation by the poor performance of the fabricated inductors. In addition to serving as a portion of the author's thesis requirements, the fabricated chips are to be incorporated into a university laboratory session in subsequent semesters.




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