Register-transfer-level design and software simulation of a parallel processor (The three-dimensional computer)

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dc.contributor.authorHanna, William Azizen
dc.date.accessioned2015-05-12T20:38:00Z
dc.date.available2015-05-12T20:38:00Z
dc.date.issued1974en
dc.identifier.urihttps://scholarworks.montana.edu/handle/1/4330en
dc.language.isoenen
dc.publisherMontana State University - Bozeman, College of Engineeringen
dc.rights.holderCopyright 1974 by William Aziz Hannaen
dc.subject.lcshElectronic digital computersen
dc.subject.lcshComputer programmingen
dc.titleRegister-transfer-level design and software simulation of a parallel processor (The three-dimensional computer)en
dc.typeDissertationen
thesis.catalog.ckey339975en
thesis.degree.departmentElectrical & Computer Engineering.en
thesis.degree.genreDissertationen
thesis.degree.namePhDen
thesis.format.extentfirstpage1en
thesis.format.extentlastpage363en

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