Reconfigurable hardware accelerators for high performance radiation tolerant computers

Abstract

Computers play an important role in spaceflight and with ever more complex mission goals and sensors, current devices are not sufficient to meet the requirements of planned missions. These challenges are complicated by memory corruption caused by high energy radiation inherent in the space environment. We propose the use of commercial field programmable gate arrays using partial reconfiguration, triple modular redundancy with spares and memory scrubbing to achieve a radiation hard, high performance system. This strategy is leveraged on modern fabrication process nodes largely eliminating long term effects of radiation on silicon devices and shifting the focus strictly on memory corruption errors. This dissertation improves the performance of Montana State University's (MSU) existing CubeSat computing research platform through the addition of hardware accelerator tiles, a reliability analysis and analysis of the power consumption vs performance tradeoffs allowing for the development of a metric for the use of accelerator functions.