Novel die-to-die coaxial interconnect system for use in System-in-Package applications

Abstract

The electrical parasitics of traditional integrated circuit (IC) packaging methods are a known bottleneck to overall system performance. The parasitic inductance and capacitance of traditional package interconnect such as wire bonds, create noise sources which ultimately limit the speed at which a digital system can run. Recent advances in package interconnect have reduced these parasitics by moving to a System-in-Package (SiP) approach. In SiP, multiple IC dies are connect directly to each other and encapsulated within the same package. This improves performance by eliminating the need for board-level interconnect. While SiP has made significant progress in reducing the interconnect parasitics, IC dies are still connected using traditional methods such as wire bonds. The unshielded nature of the wire bond leads to noise sources such as coupling, simultaneous switching noise, and reflections. This thesis presents a new interconnect methodology which aims at improving the signaling speeds between dies within SiP. This new system uses a miniature coaxial cable that connects to on-chip coplanar waveguides on a silicon substrate. The coaxial-to-coplanar transition is accomplished using an anisotropic etch along the perimeter of the silicon substrate. This approach provides the electrical and mechanical mating of the on and off chip conductors. This system yields a fully shielded, matched impedance signal path in addition to a low impedance return path. This approach shows reduction of the three main sources of electrical noise in SiP and leads to a significant improvement in system performance.